Symphony EDA (R) VHDL Compiler/Simulator Module VhdlP, Version 2.3, Build#8. Copyright(C) Symphony EDA 1997-2004. All rights reserved. Reading C:\Program Files\Symphony EDA\VHDL Simili 2.3\bin\symphony.ini ... Library 'ieee' ==> $SYMPHONYEDA/lib/ieee/ieee.sym (readonly) Library 'c' ==> c.sym Library 'work' ==> Library 'c' ==> c.sym Reading $SYMPHONYEDA\lib\ieee\ieee.sym\std_logic_1164\prim.var Parsing Package:ctype_h @ line ..\..\ctype_h.vhd:28 Writing c.sym\ctype_h\prim.var Parsing Package Body:ctype_h @ line ..\..\ctype_h.vhd:69 Writing c.sym\ctype_h\_body.var Elapsed Time: 00h:00m:00s:040ms Kernel Time: 00h:00m:00s:160ms User Time: 00h:00m:00s:070ms Symphony EDA (R) VHDL Compiler/Simulator Module VhdlP, Version 2.3, Build#8. Copyright(C) Symphony EDA 1997-2004. All rights reserved. Reading C:\Program Files\Symphony EDA\VHDL Simili 2.3\bin\symphony.ini ... Library 'ieee' ==> $SYMPHONYEDA/lib/ieee/ieee.sym (readonly) Library 'c' ==> c.sym Library 'work' ==> Library 'c' ==> c.sym Parsing Package:debugio_h @ line ..\..\debugio_h.vhd:26 Writing c.sym\debugio_h\prim.var Parsing Package Body:debugio_h @ line ..\..\debugio_h.vhd:39 Writing c.sym\debugio_h\_body.var Elapsed Time: 00h:00m:00s:030ms Kernel Time: 00h:00m:00s:150ms User Time: 00h:00m:00s:050ms Symphony EDA (R) VHDL Compiler/Simulator Module VhdlP, Version 2.3, Build#8. Copyright(C) Symphony EDA 1997-2004. All rights reserved. Reading C:\Program Files\Symphony EDA\VHDL Simili 2.3\bin\symphony.ini ... Library 'ieee' ==> $SYMPHONYEDA/lib/ieee/ieee.sym (readonly) Library 'work' ==> work.sym Library 'c' ==> c.sym Reading c.sym\debugio_h\prim.var Reading c.sym\ctype_h\prim.var Reading $SYMPHONYEDA\lib\ieee\ieee.sym\std_logic_1164\prim.var Parsing Entity:debugio_h_test @ line debugio_h_test.vhd:33 Writing work.sym\debugio_h_test\prim.var Parsing Architecture:debugio_h_test(debugio_h_test_arch) @ line debugio_h_test.vhd:35 Writing work.sym\debugio_h_test\_debugio_h_test_arch.var Parsing Configuration:debugio_h_test_cfg @ line debugio_h_test.vhd:66 Writing work.sym\debugio_h_test_cfg\prim.var Elapsed Time: 00h:00m:00s:090ms Kernel Time: 00h:00m:00s:110ms User Time: 00h:00m:00s:100ms Symphony EDA (R) VHDL Compiler/Simulator Module VhdlE, Version 2.3, Build#8. Copyright(C) Symphony EDA 1997-2004. All rights reserved. Note: CSVHE0051: vhdle: Thank you for using the free version of from VHDL Simili. Warning: CSVHE0055: vhdle: Simulator will run at reduced perfomance and with certian features disabled Reading C:\Program Files\Symphony EDA\VHDL Simili 2.3\bin\symphony.ini ... Library 'ieee' ==> $SYMPHONYEDA/lib/ieee/ieee.sym (readonly) Library 'work' ==> work.sym Reading work.sym\debugio_h_test_cfg\prim.var Reading work.sym\debugio_h_test\_debugio_h_test_arch.var Library 'c' ==> c.sym Reading c.sym\ctype_h\_body.var Reading $SYMPHONYEDA\lib\ieee\ieee.sym\std_logic_1164\_body.var Reading c.sym\debugio_h\_body.var # of Signals = 0 # of Components = 0 # of Processes = 1 # of Drivers = 0 Design Load/Elaboration Elapsed Time: 00h:00m:00s:040ms --begin test; Time: 0 ps+0 hello, world abc=abc 5==(5) -25==[-25] 123==123 456==456 --end test; Simulation stopped at: 0 ps Simulation Elapsed Time: 00h:00m:00s:010ms Total Kernel Time: 00h:00m:00s:210ms Total User Time: 00h:00m:00s:120ms